DCTRs – Coordinator’s UART interface

dpa-principleSPI is not exclusive interface for DCTR coordinator handling. You can use UART interface too. This article shows, how to do it. Please note, that presented information are valid for DPA framework 2.01 and could be different for another version of DPA.

I expect, you have coordinator and bonded nodes from my previous post. If not, please follow instructions from this post. Of course, we can do it by UART way, but not now. We will follow easier way.

Please follow this steps:

  • You have SPI coordinator and three or more bonded nodes.
  • Discover nodes and test RED LED blink on all of them.
  • Add DemoHWP-CoordinatorNode-UART-V201-140602.iqrf to project and upload it to the coordinator module.
  • Now you have UART controlled coordinator.
  • Remove coordinator DCTR from CK-USB-04 and use it with some RS-232 to 3V3-UART or USB to 3V3-UART converter and some breakout board.
  • You are prepared to control IQMESH.



UART setup and protocol

UART is configured as 8 data bits, 1 stop bit, no parity bit. HDLC byte stuffing protocol is used to transfer data. Every data frame starts and ends with byte 0x7E. Please note:

If you need to send 0x7D or 0x7E data bytes, you have to replace them by following rule:

Your data: 0x7D → you will send 0x7D;0x5D
Your data: 0x7E → you will send 0x7D;0x5E

There is small example:

You want switch on RED LED on node 2. So NAdr is 0x0002, PNum is 0x06, PCmd is 0x01, HWProfile is 0xFFFF.

Packet format is:

0x7E 0x02 0x00 0x06 0x01 0xFF 0xFF 0x5A 0x7E

0x7E – start and end of frame, 0x02 – low address byte, 0x00 – high address byte, 0x06 – peripheral number, 0x01 – command, 0xFF 0xFF – any HW profile will execute the request, 0x5A – CRC.

CRC is calculated as XOR operation over all original data bytes and then XOR with 0x5F.

From our example: CRC = 0x02 ^ 0x00 ^ 0x06 ^ 0x01 ^ 0xFF ^ 0xFF ^ 0x5F.

Finally there are two messages for node 2:

  • 0x7E 0x02 0x00 0x06 0x01 0xFF 0xFF 0x5A 0x7E switch on the RED LED
  • 0x7E 0x02 0x00 0x06 0x00 0xFF 0xFF 0x5B 0x7E switch off the RED LED

Answers are the same as for SPI controlled coordinator, but it HDLC byte stuffing protocol.

request (RED LED on)
3.1.2015 21:32:13.03 [TX] - 7E 02 00 06 01 FF FF 5A 7E 
3.1.2015 21:32:13.06 [RX] - 7E 02 00 06 01 FF FF FF 5C 01 03 01 FA 7E 
3.1.2015 21:32:13.15 [RX] - 7E 02 00 06 81 00 00 00 62 B8 7E 
request (RED LED off)
3.1.2015 21:32:14.15 [TX] - 7E 02 00 06 00 FF FF 5B 7E 
3.1.2015 21:32:14.19 [RX] - 7E 02 00 06 00 FF FF FF 5C 01 03 01 FB 7E 
3.1.2015 21:32:14.28 [RX] - 7E 02 00 06 80 00 00 00 62 B9 7E 


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